Evaluation of Power Estimation Methods Based on Logic Simulations

Power simulation of digital circuits in early stages of development is a very popular topic amongst circuit designers. This paper discusses available power estimation techniques at the logic level. We elaborate on the fact that this technique can also be used to investigate an implementation’s DPA resistance with modest effort. Our practical investigations are based on an 8051-compatible controller that has been implemented on a 0.13μm chip. The results show that power consumption estimations of a digital circuit as well as reliable DPA-resistance results can be achieved based on logic simulations.